Tick–tock model: Difference between revisions
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Undid revision 475021542 by Visite fortuitement prolongée (talk) it isn't out of scope; see new external links - many more in Google |
Thank you for the links, but Intel's Atom, Intel's Itanium, GlobalFoundries, TSMC, are not processors designed with Intel's Tick-Tock strategy. Please explain in the talk page before other add. |
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! rowspan="2" | Release date |
! rowspan="2" | Release date |
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! colspan="4" | Processors |
! colspan="4" | Processors |
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! rowspan="14" | |
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! colspan="2" | [[Intel Atom|Atom]] |
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! rowspan="2" | [[Intel Itanium|Itanium]] |
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! rowspan="14" | |
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! rowspan="2" | [[GlobalFoundries|AMD/GF]] |
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! rowspan="2" | [[Taiwan Semiconductor Manufacturing Company|TSMC]] |
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! Enthusiast |
! Enthusiast |
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! Mobile |
! Mobile |
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! Marketing names |
! Marketing names |
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! Mainstream |
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! Low power |
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| Tick |
| Tick |
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* [[Pentium Dual-Core]] |
* [[Pentium Dual-Core]] |
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* [[Celeron]] |
* [[Celeron]] |
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|— |
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|— |
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| — |
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| 65nm [[Athlon 64 X2|Brisbane]]<br>Dec 2006 |
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| 65nm Jul 2007 |
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| Tock |
| Tock |
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* [[Celeron#Core microarchitecture based|Celeron]] |
* [[Celeron#Core microarchitecture based|Celeron]] |
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* [[Celeron#Core microarchitecture based|Celeron M]] |
* [[Celeron#Core microarchitecture based|Celeron M]] |
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|— |
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|— |
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| [[Tukwila (processor)|Tukwila]]<br>Feb 2010 |
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| 65nm [[Opteron|Barcelona]]<br>Sep 2007 |
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| [[Half-node|55nm]] Jan 2008 |
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|- |
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| Tick |
| Tick |
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| [[Wolfdale (microprocessor)|Wolfdale]] |
| [[Wolfdale (microprocessor)|Wolfdale]] |
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| [[Penryn (microprocessor)|Penryn]] |
| [[Penryn (microprocessor)|Penryn]] |
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| rowspan="2"| Diamondville<br>Jun 2008<br><br>Pineview<br>Jan 2010 |
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| rowspan="2"| Silverthorne<br>Apr 2008<br><br>Lincroft<br>May 2010 |
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| rowspan="2" |— |
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| 45nm [[Phenom II]]<br> Jan 2009 |
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| rowspan="2" |[[Half-node|40nm]] Apr 2009 |
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| Tock |
| Tock |
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* [[Pentium]] |
* [[Pentium]] |
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* [[Celeron]] |
* [[Celeron]] |
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| — |
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|- |
|- |
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| Tick |
| Tick |
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| [[Clarkdale (microprocessor)|Clarkdale]] |
| [[Clarkdale (microprocessor)|Clarkdale]] |
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| [[Arrandale]] |
| [[Arrandale]] |
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| Cedarview<br>Nov 2011 |
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| Medfield<br>H1 2012 |
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| — |
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| 32nm [[AMD Llano|Llano]]<br>Jun 2011 |
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| rowspan=2| [[Half-node|28nm]] Jan 2012 |
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|- |
|- |
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| Tock |
| Tock |
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| Sandy Bridge-DT |
| Sandy Bridge-DT |
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| Sandy Bridge-NB |
| Sandy Bridge-NB |
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| — |
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| — |
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| Poulson 2012 |
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| 32nm/[[Half-node|28nm]]<br>2012/2013 |
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| Tick |
| Tick |
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|— |
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|— |
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| rowspan=2|Kittson 2014 |
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| rowspan=2| [[Half-node|20nm]] |
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| rowspan=2| [[Half-node|20nm]] |
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| Tock |
| Tock |
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| colspan=2 | Silvermont 2013 |
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| Tick |
| Tick |
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| colspan=2 rowspan=2| Airmont 2014 |
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| Kittson+ |
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|rowspan=2| [[Half-node|14nm]] |
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|rowspan=2| [[Half-node|14nm]] |
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| Tock |
| Tock |
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|— |
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| Tick |
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|rowspan=2|[[Half-node|10nm]] |
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|rowspan=2|[[Half-node|10nm]] |
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|- |
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| Tock |
| Tock |
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| 2017 |
| 2017 |
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==External links== |
==External links== |
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* [http://www.intel.com/content/www/us/en/silicon-innovations/intel-tick-tock-model-general.html Intel Tick-Tock Model of Architecture & Silicon Cadence] |
* [http://www.intel.com/content/www/us/en/silicon-innovations/intel-tick-tock-model-general.html Intel Tick-Tock Model of Architecture & Silicon Cadence] |
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* [http:// |
* [http://www.anandtech.com/show/2842 Intel Tick-Tock Model at IDF 2009] |
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* [http://download.intel.com/newsroom/kits/idf/2011_fall/pdfs/Kirk_Skaugen_DCSG_MegaBriefing.pdf#page=21 Intel Tick-Tock Model at IDF 2011, p.21] |
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* [http://www.anandtech.com/show/2842 Atom Gets Tick Tock, Sorta] |
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* [http://www.anointedblog.com/?p=3302 Accelerating the Atom SoC roadmap] |
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* [http://www.xbitlabs.com/news/cpu/display/20120125203701_AMD_Quietly_Adopting_Tick_Tock_Model_for_Micro_Architectures.html AMD Quietly Adopting "Tick-Tock" Model for Micro-Architectures] |
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[[Category:Intel x86 microprocessors]] |
[[Category:Intel x86 microprocessors]] |
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Revision as of 21:12, 5 February 2012
"Tick-Tock" is a model, [citation needed] of Jones Farm 5 (Hillsboro, Oregon) and adopted by chip manufacturer Intel Corporation since 2007 to follow every microarchitectural change with a die shrink of the process technology. Every "tick" is a shrinking of process technology of the previous microarchitecture and every "tock" is a new microarchitecture.[1] Every year, there is expected to be one tick or tock.[1]
Roadmap
| Architectural change | Codename | Fabrication process | Release date | Processors | ||||
|---|---|---|---|---|---|---|---|---|
| Enthusiast | Desktop | Mobile | Marketing names | |||||
| Tick | Die shrink | Presler, Cedar Mill, Yonah | 65 nm | January 5, 2006 | Presler | Cedar Mill | Yonah | |
| Tock | New microarchitecture | Core | July 27, 2006[2] | Kentsfield | Conroe | Merom | ||
| Tick | Die shrink | Penryn | 45 nm | November 11, 2007[3] | Yorkfield | Wolfdale | Penryn | |
| Tock | New microarchitecture | Nehalem | November 17, 2008[4] | Bloomfield | Lynnfield | Clarksfield | ||
| Tick | Die shrink | Westmere | 32 nm | January 4, 2010[5][6] | Gulftown | Clarkdale | Arrandale | |
| Tock | New microarchitecture | Sandy Bridge | January 9, 2011[7] | Sandy Bridge-EX | Sandy Bridge-DT | Sandy Bridge-NB | ||
| Tick | Die shrink | Ivy Bridge | 22 nm | Q2 2012 | ||||
| Tock | New microarchitecture | Haswell | Q1 2013 | |||||
| Tick | Die shrink | Broadwell[8] | 14 nm[9] | 2014[5] | ||||
| Tock | New microarchitecture | Skylake[8] | 2015 | |||||
| Tick | Die shrink | Skymont[8] | 10 nm[9] | 2016 | ||||
| Tock | New microarchitecture | 2017 | ||||||
See also
References
- ^ a b Intel Tick-Tock Model
- ^ Intel CEO: Latest Platforms, Processors Form New Foundations For Digital Entertainment And Wireless Computing, Intel Unveils World's Best Processor
- ^ Intel Unveils 16 Next-Generation Processors, Including First Notebook Chips Built on 45nm Technology
- ^ Intel Launches Fastest Processor on the Planet
- ^ a b [1]
- ^ Revolutionizing How We Use Technology—Today and Beyond
- ^ Intel Sandy Bridge chip coming January 5
- ^ a b c After Intel's Haswell comes Broadwell - SemiAccurate
- ^ a b [2]
External links
- Intel Tick-Tock Model of Architecture & Silicon Cadence
- Intel Tick-Tock Model at IDF 2009
- Intel Tick-Tock Model at IDF 2011, p.21
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