Trap flag

A trap flag permits operation of a processor in single-step mode. If such a flag is available, debuggers can use it to step through the execution of a computer program.

Single-step interrupt

When a system is instructed to single-step, it will execute one instruction and then stop. The contents of registers and memory locations can be examined; if they are correct, the system can be told to go on and execute the next instruction. The Intel 8086 trap flag and type-1 interrupt response make it quite easy to implement a single-step feature in an 8086-based system. If the trap flag is set, the 8086 will automatically do a type-1 interrupt after each instruction executes. When the 8086 does a type-1 interrupt, it pushes the flag register on the stack.

Setting

The 8086 has no instruction to directly set or reset the trap flag. These operations are done by pushing the flag register on the stack, changing the trap flag bit to what the programmer wants it to be, and then popping the flag register back off the stack. The instructions to set the trap flag are:

pushf                   ; Push flags on stack
mov bp, sp              ; Copy SP to BP for use as index
or word ptr [bp], 100h  ; Set TF flag
popf                    ; Restore flag Register

The Trap Flag is generally not used in this way, because programs are normally monitored from an Interrupt Service Routine (ISR). Execution of the program is generally continued by an IRET.

Int3ISR:              ; Stack: Ret, Flags
  pusha               ; Stack: Ret, Flags, AX, CX, DX, BX, SP, BP, SI, DI
  push ds             ; Stack: Ret, Flags, AX, CX, DX, BX, SP, BP, SI, DI, DS
  push es             ; Stack: Ret, Flags, AX, CX, DX, BX, SP, BP, SI, DI, DS, ES

  ; ... the ISR code using only integers (otherwise you must also store floating point registers)

  mov bp, sp          ; Stack: Ret, Flags, AX, CX, DX, BX, SP, BP, SI, DI, DS, ES
  mov bp, [bp+10]     ; Stored SP
  or word [bp], 100h  ; Set TF flag in the stored FLAGS register
  pop es
  pop ds
  popa
  iret                ; continue execution for one instruction, then calling the ISR again.

Resetting

To reset the trap flag, simply replace the OR instruction in the preceding sequence with the instruction:

and word ptr [bp], 0xFEFF

The trap flag is reset when the 8086 does a type-1 interrupt, so the single-step mode will be disabled during the interrupt-service procedure.

Status register 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 (bit position) - - - - O D I T S Z - A - P - C Flags