Intel i860

The Intel i860 (also 80860, and code named N10) was a RISC microprocessor from Intel, first released in 1989. It was released with considerable fanfare and obscured the release of the Intel i960 which many considered to be a better design.

The i860 was Intel's second attempt at an entirely new, high-end, ISA, after the failed Intel i432 from the 1980's. The i860 combined a number of features that were fairly unique at the time, most notably its superscalar support. The design mounted a 32-bit ALU along with a 64-bit FPU that was itself built in three parts, an adder, a multiplier, and a graphics processor, and could hand off up to three instructions per clock.

All of the busses were 64-bit wide, or wider. The internal memory bus to the cache was 128-bits wide for instance. Both units had 32 32-bit registers, but the FPU used its set as 16 64-bit ones. Instructions for the ALU were fetched two at a time to use the full external bus. Intel always referred to the design as the i860 64-Bit Microprocessor.

The graphics unit was quite unique for the era. It was essentially a 64-bit integer unit using the FPU registers. It supported a number of commands for SIMD-like instructions in addition to basic 64-bit integer math. Reading this description, it should be obvious where Intel's later MMX functionality came from.

The chip was released in two versions, the basic XR, and the XP (code name N11). The XP added larger on-chip caches, a second level cache, faster busses, and hardware support for bus snooping for cache consistency for use in parallel processing systems. The XR ran at 25 or 40MHz, and a process shrink for the XP (from 1 micron to 0.8) bumped the XR to 40 and 50MHz. Both ran the same instruction set.

Paper performance was awe-inspiring for a single-chip solution, peaking at about 66MFLOPS on the XP versions. Real-world performance turned out to be anything but. This was primarily due to the state of the compilers at the time. While theoretically capable of about 60MFLOPS, assembly got perhaps 40, and compilers under 10. This meant that much of the chip was going to waste.

Another serious problem was the lack of any solution to quickly handle context switching, the i860 had several pipelines (for the ALU and FPU parts) and an interrupt could spill them and need them all to be re-loaded. This too 62 cycles in the best case and almost 2000 cycles in the worse. The later is 1/50th of second, eternity for a CPU. This largely eliminated the i860 as a general purpose CPU.

At first it was only used in a small number of very large machines like the iPSC/860 at Los Alamos. As the compilers improved the performance did likewise, but by that point most other RISC designs had already passed the i860 in general performance.

The i860 did see some use in the workstation world as a graphics accelerator. It was used in the NeXTDimension for instance, where it ran a cut-down version of the Mach kernel running a complete PostScript. This use slowly disappeared as well.

In the late 90's Intel replaced their entire RISC line with ARM based designs. Confusingly, the name has now been re-used for a motherboard control chipset for Intel Xeon (high-end Pentium) systems.