Input offset voltage

The input offset voltage ( $V_{os}$ ) is a parameter defining the differential DC voltage required between the inputs of an amplifier, especially an operational amplifier (op-amp), to make the output zero (for voltage amplifiers, 0 volts with respect to ground or between differential outputs, depending on the output type).^[1]

Details

An ideal op-amp amplifies the differential input; if this input difference is 0 volts (i.e. both inputs are at the same voltage), the output should be zero. However, due to manufacturing process, the differential input transistors of real op-amps may not be exactly matched. This causes the output to be zero at a non-zero value of differential input, called the input offset voltage.

Typical values for $V_{os}$ are around 1 to 10 mV for cheap commercial-grade op-amp integrated circuits (IC). This can be reduced to several microvolts if nulled using the IC's offset null pins or using higher-quality or laser-trimmed devices. However, the input offset voltage value may drift with temperature or age. Chopper amplifiers^[2] actively measure and compensate for the input offset voltage, and may be used when very low offset voltages are required.

Input bias current and input offset current also affect the net offset voltage seen for a given amplifier. The voltage offset due to these currents is separate from the input offset voltage parameter and is related to the impedance of the signal source and of the feedback and input impedance networks, such as the two resistors used in the basic inverting and non-inverting amplifier configurations. FET-input op-amps tend to have lower input bias currents than bipolar-input op-amps, and hence incur less offset of this type.

Input offset voltage is symbolically represented by a voltage source that is in series with either the positive or negative input terminal (it is mathematically equivalent either way). Normally input offset voltage is measured in the terms of input voltage applied at the non-inverting terminal to make output zero. ^[3]

References

^ Floyd, Thomas L.; Buchla, David (1998). Fundamentals of Analog Circuits. Prentice Hall. ISBN 0-13-836933-X.
^ Assim, Ara Abdulsatar; Balashov, Evgenii (2022), Velichko, Elena; Kapralova, Viktoria; Karaseov, Platon; Zavjalov, Sergey (eds.), "Design of CMOS Operational Amplifiers with Dynamic Offset Cancellation", International Youth Conference on Electronics, Telecommunications and Information Technologies, vol. 268, Cham: Springer International Publishing, pp. 317–325, doi:10.1007/978-3-030-81119-8_32, ISBN 978-3-030-81118-1, retrieved 2023-08-30
^ http://www.ti.com/lit/an/sloa059/sloa059.pdf page 3

External links

Analog Devices tutorial on op-amp input offset voltage and mitigation techniques

[1] Floyd, Thomas L.; Buchla, David (1998). Fundamentals of Analog Circuits. Prentice Hall. ISBN 0-13-836933-X.

[2] Assim, Ara Abdulsatar; Balashov, Evgenii (2022), Velichko, Elena; Kapralova, Viktoria; Karaseov, Platon; Zavjalov, Sergey (eds.), "Design of CMOS Operational Amplifiers with Dynamic Offset Cancellation", International Youth Conference on Electronics, Telecommunications and Information Technologies, vol. 268, Cham: Springer International Publishing, pp. 317–325, doi:10.1007/978-3-030-81119-8_32, ISBN 978-3-030-81118-1, retrieved 2023-08-30

[3] ttp://www.ti.com/lit/an/sloa059/sloa059.pdf page 3

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